TY - GEN UR - http://lib.ugent.be/catalog/pug01:8535942 ID - pug01:8535942 LA - eng TI - ParaFPGA15 : exploring threads and trends in programmable hardware PY - 2015 SN - 978-1-61499-620-0 SN - 978-1-61499-621-7 PB - Amsterdam AU - D'Hollander, Erik AU - Stroobandt, Dirk TW06 801000975717 0000-0002-4477-5313 AU - Touhafi, Abdellah AU - Joubert, Gerhard editor AU - Leather, Hugh editor AU - Parsons, Mark editor AU - Peters, Frans editor AU - Sawyer, Mark editor AB - The symposium ParaFPGA focuses on parallel techniques using FPGAs as accelerator in high performance computing. The green computing aspects of low power consumption at high performance were somewhat tempered by long design cycles and hard programmability issues. However, in recent years FPGAs have become new contenders as versatile compute accelerators because of a growing market interest, extended application domains and maturing high-level synthesis tools. The keynote paper highlights the historical and modern approaches to high-level FPGA and the contributions cover applications such as NP-complete satisfiability problems and convex hull image processing as well as performance evaluation, partial reconfiguration and systematic design exploration. ER -Download RIS file
| 00000nam^a2200301^i^4500 | |||
| 001 | 8535942 | ||
| 005 | 20181113145517.0 | ||
| 008 | 171031s2015------------------------eng-- | ||
| 020 | a 978-1-61499-620-0 | ||
| 020 | a 978-1-61499-621-7 | ||
| 024 | a 1854/LU-8535942 2 handle | ||
| 024 | a 10.3233/978-1-61499-621-7-501 2 doi | ||
| 040 | a UGent | ||
| 245 | a ParaFPGA15 : exploring threads and trends in programmable hardware | ||
| 260 | a Amsterdam, The Netherlands b IOS Press c 2015 | ||
| 520 | a The symposium ParaFPGA focuses on parallel techniques using FPGAs as accelerator in high performance computing. The green computing aspects of low power consumption at high performance were somewhat tempered by long design cycles and hard programmability issues. However, in recent years FPGAs have become new contenders as versatile compute accelerators because of a growing market interest, extended application domains and maturing high-level synthesis tools. The keynote paper highlights the historical and modern approaches to high-level FPGA and the contributions cover applications such as NP-complete satisfiability problems and convex hull image processing as well as performance evaluation, partial reconfiguration and systematic design exploration. | ||
| 598 | a C1 | ||
| 700 | a D'Hollander, Erik u TW06 0 801000299343 9 F39F2012-F0ED-11E1-A9DE-61C894A0A6B4 | ||
| 700 | a Stroobandt, Dirk u TW06 0 801000975717 0 0000-0002-4477-5313 9 F4D6D3D0-F0ED-11E1-A9DE-61C894A0A6B4 | ||
| 700 | a Touhafi, Abdellah | ||
| 700 | a Joubert, Gerhard e editor | ||
| 700 | a Leather, Hugh e editor | ||
| 700 | a Parsons, Mark e editor | ||
| 700 | a Peters, Frans e editor | ||
| 700 | a Sawyer, Mark e editor | ||
| 650 | a Technology and Engineering | ||
| 653 | a FPGA performance | ||
| 653 | a high-level synthesis | ||
| 653 | a OpenCL | ||
| 653 | a functional programming | ||
| 653 | a satisfiability problem | ||
| 653 | a image processing | ||
| 773 | t International Conference on Parallel Computing (ParCo) 2015 g ParCo 2015. 2015. IOS Press. p.501-504 q :<501 | ||
| 856 | 3 fullText u https://biblio.ugent.be/publication/8535942/file/8535947 z [open] y Erik H. D'Hollander et al. - 2015 - XX. ParaFPGA15 Exploring threads and trends in pr.pdf | ||
| 920 | a confcontrib | ||
| Z30 | x EA 1 TW06 | ||
| 922 | a UGENT-EA | ||
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